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A new compact multi-gate single-electron transistor (MGSET) model for circuit simulations by SPICE is introduced. In addition to the multi-input gates, a random background charge QO is included in the model. The developed model is based on a linearized equivalent circuit and is implemented to the SmartSpice made by Silvaco. The drain-source current (Ids) versus gate-source voltage (Vgs) characteristics and the Ids versus drain-source voltage (Vds) characteristics, calculated by using the model, reproduce those of a Monte-Carlo simulator within a 1 % error. One simulation of SE-FET hybrid circuits, consisting of one MGSET and two MOSFETs, was successfully done.


A new compact multi-gate single-electron transistor (MGSET) model for circuit simulations by SPICE is introduced. In addition to the multi-input gates, a random background charge QO is included in the model. The developed model is based on a linearized equivalent circuit and is implemented to the SmartSpice made by Silvaco. The drain-source current (Ids) versus gate-source voltage (Vgs) characteristics and the Ids versus drain-source voltage (Vds) characteristics, calculated by using the model, reproduce those of a Monte-Carlo simulator within a 1 % error. One simulation of SE-FET hybrid circuits, consisting of one MGSET and two MOSFETs, was successfully done.